Analytic models for performance evaluation of single-buffered banyan networks under nonuniform traff - Computers and Digital Techniques [see also IEE Proceedings-Computers and Digital Techniques], IEE
نویسنده
چکیده
The performance of single-buffered banyan networks under certain nonuniform traffic patterns had been studied by Garg and Huang. However, the models used are over simplified and the results obtained may deviate from exact values significantly. Alternative models to achieve more accurate performance estimates are presented. In our models, the destinations of blocked packets residing in the buffers of nodes at stage 1 (and perhaps stage 2, depending on the traffc matrix) are memorised. Compared with those adopted by Garg and Huang, our models are only slightly more complicated. By viewing banyan networks as queueing systems, we apply Little’s formula to compute the average packet delays.
منابع مشابه
Performance of banyan networks with inhomogeneous traffic flow - Computers and Digital Techniques [see also IEE Proceedings-Computers and Digital Techniques], IEE
To date, most research results regarding the performance of banyan networks assumed a uniform traffic model. Sources are assumed to generate connection requests independently with the same rate and, moreover, connection requests are assumed to be independently and equally likely destined to each destination. This assumption, which greatly simplifies analysis, may not be true for real-world syst...
متن کاملTagged systolic arrays - Computers and Digital Techniques [see also IEE Proceedings-Computers and Digital Techniques], IEE
Design of systolic arrays from a set of non-linear and nonuniform recurrence equations is discussed. A systematic method for deriving a systolic design in such cases is presented. A novel architectural idea, termed a tagged systolic array (TSA), is introduced. The design methodology described broadens the class of algorithms amenable for tagged systolic array implementation. The methodology is ...
متن کاملMapping single and multiple multilevel structures onto the hypercube - Computers and Digital Techniques [see also IEE Proceedings-Computers and Digital Techniques], IEE
The paper introduces algorithms that map single and multiple multilevel structures onto the hypercube. For the case of the pyramid, which is a special multilevel structure, it is shown that a new algorithm is a compromise among existing algorithms with regard to cost and performance. Comparative analysis of the algorithms is carried out using analytical techniques and simulation results.
متن کاملAutomated synthesis of digital multiplexer networks - Computers and Digital Techniques [see also IEE Proceedings-Computers and Digital Techniques], IEE
A programmed algorithm is presented for the synthesis and optimisation of networks implemented with multiplexer universal logic modules. The algorithm attempts level by level optimisation selecting the control variables that result in minimum number of continuing branches. Cascaded networks, if realisable, are always found and given preference over tree networks, though mixtures of cascade and ...
متن کاملEfficient state reduction methods for PLA-based sequential circuits - Computers and Digital Techniques [see also IEE Proceedings-Computers and Digital Techniques], IEE
/ Abstract: Experiences with heuristics for the state reduction of finite-state machines are presented and two new heuristic algorithms described in detail. Results on machines from the literature and from the MCNC benchmark set are shown. The area of the PLA implemention of the combinational component and the design time are used as figures of merit. The comparison of such parameters, when the...
متن کامل